Objective:
To obtain a challenging position as a logic design engineer.

Education: 
University of California, Los Angeles
--M.S. Electrical Engineering (June, 1997)
--B.S.  Electrical Engineering (March, 1996)

Working Experience:

* VLSI Design Engineer at Faroudja (8/98--present)
  Verilog coding, Synopsys simulation and synthesis of a 200+ 
  gate video processor. Duties include but not limited to:
  - Preparation of design specification: from understanding of 
    video signal formats to participating in writing up of design
    specification.
  - Actual verilog coding of several large blocks of design. 
    Use Synopsys VCS simulation for debugging, and Design complier 
    for synthesis.
  - Modify and connect small modules into large blocks and verify 
    with Synopsys simulation.
  - Perform silicon area optimization: reducing multipliers to 
    adders and algorithm simplification. Also apply RAM delay and
    register pipeline delay trade-off to minimize design area.
  - Generate test video signals for desgin verification.

* Member of Technical Staff at Rockwell Science Center (August 97-present)
  Duties include but not limited to:
  - Complete design of an ASIC 50K gate programmable 8-bit IIR filter bank.
    Top down design from specifications. The chip was fabricated and tested 
    to be working.  
  - use commercial parts to design low noise analog amplify, ADC, and RF
    circuits.
  - System integration for wireless sensor products.

* Research assistant at UCLA microsensor laboratory (March 96-present)
  Duties performed:
  - Designed a programmable power spectrum density calculation ASIC chip.
    The chip was about 20k and it was fabricated and tested to be working.
  - System development for integrated sensor network. 
  - Program microprocessors to implement real time data acquisition, 
    control, serial interface, and TDMA protocol. 
  - C programming for user interface.

* Lab assistant at Dr. Kaiser's research laboratory, EE Dept. UCLA.(June 95-March 96)
  Duties performed:
  - An ASIC design of the digital portion of a sigma-delta A/D converter.
  - Low power RF system development with commercial parts.

                
MSEE  Thesis Topic: 
Micropowered Programmable DSP For Wireless Sensor Applications

Skills: 
* Digital and analog circuit design, real time embedded firmware 
  development.
* VLSI ASIC design - front to back with VHDL, SYNOPSYS and CASCADE.
* Micro-controller instruction programming with ASSEMBLY.
* PCB level circuit and system design   
* Digital input/output interface circuit design and implementation.
* Digital filter characterization with MATLAB.
* Silicon processing experience.
* Circuit simulation and analysis with HSPICE.
* Layout experience with MAGIC and VEM.


Some Classes Taken:
* EE216   Principles of Digital CMOS VLSI Design. Class project: 80MHz
  throughput divider.
* EE215B Advanced Digital CMOS VLSI Design. Topics including: glitches,
  charge sharing, clock feedthrough, pipe-lining, scaling, power optimization
  and many others.
* EE215A Analog Integrated Circuits. Class project: fast and accurately
  settling OpAmp with sampling rate equal to 100Mhz, settling accuracy less
  than -75dB, and dynamic range great than 75dB.
* EE219A Principles of RF Design. Class project: 900MHz, 50mW heterodyne
  receiver front end including LNA, mixers, and local oscillators.
  NF=3dB, IIP3=-15dBm.
* EE122AL CMOS Circuit Fabrication Laboratory. Complete silicon processing of
  CMOS inverter circuits.

Special Training:
* Completion of  CADENCE training course IC/ASIC Design Composition and
  Analysis with certification.(Dec. 1996)


Publications:
* William J. Kaiser, Hank Marcy, Michael Dong, et al,  "Low Power Systems for
  Wireless Microsensors", International Symposium on Low Power Electronics
  and Design, pp17-21, August 1996.
* William J. Kaiser, Hank Marcy, Felice Lin, David Chang, Michael Dong, et al,
  "Wireless Integrated Microsensors", Proceedings of the 1996 Hilton Head
  Transducers Conference.
* Michael Dong, K. Geoffrey Yung, William J. Kaiser, "Low Power Signal
  Processing Architectures for Network Microsensors", International Symposium
  on Low Power Electronics and Design, August 1997.

Associations:
* Eta Kappa Nu-Electrical Engineering honor society. Member since December
  1993 and activity chair (June 94-June 95).
* Tau Beta Pi-Engineering honor society, member since December 1993.